Training and Inference using Approximate Floating-Point Arithmetic for Energy Efficient Spiking Neural Network Processors

초록

This paper presents a systematic analysis of spiking neural network (SNN) performance with reduced computation precisions using approximate adders. We propose an IEEE 754 based approximate floating-point adder that applies to the leaky integrate-and-fire (LIF) neuron-based SNN operation for both training and inference. The experimental results under a two layer SNN for MNIST handwritten digit recognition application show that 4-bit exact mantissa adder with 19-bit approximation for lower-part OR adder (LOA), instead of 23-bit full-precision mantissa adder, can be exploited to maintain good classification accuracy. When adopted LOA as mantissa adder, it can achieve up to 74.1% and 96.5% of power and energy saving, respectively.

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