A 56 Gb/s Zero-IF D-Band Beamforming Transmitter in 22 nm FD-SOI

  • Zhang, Yang; 
  • Vaesen, Kristof; 
  • Mangraviti, Giovanni; 
  • Yavuz Kapusuz, Kamil; 
  • Park, Sehoon; 
  • 외 4명
Citations

WEB OF SCIENCE

3
Citations

SCOPUS

5

초록

This article presents a 4-way transmitter (TX) array suitable for beamforming operation at D-band. The transmitter is implemented using zero-IF architecture with LO beamforming. The signal path comprises an I/Q baseband (BB) section, direct up-conversion, and a power amplifier chain, supporting a wideband operation from 118 to 147 GHz. A 5-stage 2-way power amplifier chain provides a saturation output power up to 11 dBm. The probing measurement results demonstrate up to 64 quadrature amplitude modulation (64QAM) [30 Gb/s at -25 dB rms-error vector magnitude (EVM)] and achieve a data rate of 56 Gb/s with a -17 dB rms-EVM at an output power of 3 dBm using 16QAM modulation. The LO chain contains a 14-16 GHz buffer, a cascade of two frequency triplers for LO generation at D-band using an external LO reference. A tunable matching network with 6-bit capacitor-band control is implemented in the buffer stage together with a polarity switch to achieve full range phase control. An efficient I/Q generation scheme is implemented by exploiting the last tripler before the I/Q mixer: two LC buffers after 1st tripler generates +/- 15 degrees phase offset. This results into +/- 45 degrees phase offset after the 2nd tripler. The benefits of our sub-harmonic I/Q generation are: 1) no I/Q hybrid operating in D-Band is needed; 2) the limited +/- 15 degrees phase offset required allows an easy LC tuned buffer implementation with limited amplitude variation across phase range; and 3) this amplitude variation is removed by 2nd tripler and LO buffers that operate at saturation level. This LO beamforming scheme ensures a phase resolution of 0.1 degrees in measurement. A single TX channel draws 232 mW from a 0.8 V supply and has an area of mm(2) in a 22 nm fully depleted silicon on insulator (FD-SOI) process. The 4-way beamformer IC has been flip-chip mounted on a low-cost 10-layer printed circuit board (PCB) and connected to a planar antenna array integrated at the backside of the PCB. The antennas are placed with 1.1 mm spacing and each antenna contains 4 aperture-coupled patch units to enhance the radiation pattern. The 4-way TX beamformer has been tested over-the-air (OTA) with a reference receiver achieving 24 Gb/s with -25 dB rms-EVM at 0.4 m distance using 5G NR waveforms.

키워드

Array signal processing; Radio frequency; Phase control; Linearity; Wideband; Tuning; Thermal noise; Phase noise; Radio transmitters; Quadrature amplitude modulation; Antenna array; beamforming; CMOS; D-band; error vector magnitude (EVM); fully depleted silicon on insulator (FD-SOI); flip-chip; high-speed; packaging; quadrature amplitude modulation (QAM); radiation; transmitter; wireless communication; wideband; zero-IF; CHIPSET; MODULE
제목
A 56 Gb/s Zero-IF D-Band Beamforming Transmitter in 22 nm FD-SOI
저자
Zhang, Yang; Vaesen, Kristof; Mangraviti, Giovanni; Yavuz Kapusuz, Kamil; Park, Sehoon; Glassee, Miguel; Lemey, Sam; Wambacq, Piet; Gramegna, Giuseppe
DOI
10.1109/TMTT.2025.3613831
발행일
2025-10-06
유형
Article; Early Access
저널명
IEEE Transactions on Microwave Theory and Techniques
권
73
호
12
페이지
10904 ~ 10914