Engineering Strategies in HfOx RRAM-Based Analog Synapses Toward Linear Weight Update for Neuromorphic Hardware Accelerators

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초록

This study introduces two distinct engineering approaches for HfOx-based resistive memories (RRAMs) that can be implemented in various manners for neuromorphic hardware platforms. For highly dense cross-point synaptic arrays, we show that a gradual weight update can be achieved even in selector-free RRAM by integrating a thin Al2O3 nonlinear barrier. Meanwhile, in configurations that use conventional transistors as selectors, the weight update as quick as possible plays an important role in accelerating training process. We thus reveal that the abundant oxygen vacancies in sputtered HfOx enables nanosecond weight modulation driven by identical pulses.

제목
Engineering Strategies in HfOx RRAM-Based Analog Synapses Toward Linear Weight Update for Neuromorphic Hardware Accelerators
저자
Kim, Yunsur; Choi, Hyeonsik; Woo, Jiyong
DOI
10.1109/SNW63608.2024.10639252
발행일
2024
유형
Proceedings Paper
저널명
2024 IEEE SILICON NANOELECTRONICS WORKSHOP, SNW 2024
페이지
109 ~ 110