Detection of Road Line Markings based on Memory-centric Computing

초록

In the era of artificial intelligence, road lane marking detection is an important application of computer vision. Lane marking detection technology, which can be considered most important in the implementation of autonomous vehicles, requires a lot of computation and processing time. However, the limitations of conventional processor-centric computing for lane detection systems are progressively emerging due to the "memory wall" issue and Von Neumann bottlenecks. In this paper, we propose an algorithm to identify and differentiate three road line markings : continuous, broken, and double lines based on memory-centric computing principles. The proposed algorithm was first created in software with Python and OpenCV to confirm its viability, then the algorithm was converted to RTL using the Xilinx Vitis High-Level Synthesis (HLS) tool for hardware implementation. For FPGA implementation, we choose Xilinx Alveo U50 FPGA Accelerator. The results of this work show that the algorithm successfully distinguishes and identifies road marking lines, achieving faster processing time.

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