Design of a Vertical Cylinder GaN Junctionless FET based on its GaN-on-GaN Substrate and Electrical Performance

초록

study presents a comparative analysis of the vertical cylinder and fin-type junctionless fieldeffect transistors (JLFETs) based on GaN-on-GaN substrates using three-dimensional technical computer-aided design (3D TCAD) simulations. The on-current (I-on) values of the vertical cylinder and fin- type JLFETs are 6.45 and 5.63 kA/cm(2), respectively. The corresponding off-current (I-off) of the devices is calculated as 2.51 x 10(-10) and 9.72 x 10(-2) A/cm(2), respectively. Furthermore, their corresponding I-on/I-off ratios are 2.57 x 10(13) and 5.79 x 10(4), respectively. Additionally, the I-off ratio of the devices is 2.58 x 10(9), and the subthreshold swing (SS) is calculated as 101 and 346 mV/dec, respectively. The static resistance (R-on) and breakdown voltage (BV) represent the figure of merits of the power transistor. Herein, R-on of the vertical cylinder-type device is 0.11 mu Omega.cm(2), which is lower than 0.62 mu Omega.cm(2) of the vertical fin-type device, whereas their corresponding BVs are calculated as 2,400 and 2,037 V, respectively. These results show that the BV of the vertical cylinder-type device is similar to 17.8% higher than that of the vertical fin-type device. Therefore, the vertical cylinder-type GaN JLFET has a higher performance than the vertical fin-type GaN JLFET. Herein, we provide guidance in the designing of high-performance vertical GaN power transistors.

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