Sliding-Window-based Fast and Lightweight ADC Pseudo-Randomness Compensation Technique for Low-Cost ADC

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초록

Most of hardware circuit, such as ADC has a noise which seems like irregular and indeterminate. However, circuits proceed from human design behavior include a noise which has interpretable regularities. If a deterministic noise tendency can be extracted from ADC, it can be compensated towards ideal ADC without paying ADC hardware circuit design cost. Therefore, we use an approach based on neural networks to compensate for the noise generated by the low-cost ADC. The neural network detects the pseudo-randomness present in the noise from the ADC, which goes unaware by humans. Consequently, it is trained to compensate ADC samples to match the values of an ideal high-performance ADC. Although the software-based neural network has a simple structure resulting in a low computational load, applying compensation post-processing to all samples generated by the ADC inevitably incurs latency. Therefore we propose technique inferences the ADC sample's compensation based on sliding-window size in the artificial neural network (ANN) to reduce latency. With the proposed technique, not only the ENOB increment but the inference processing time is improved in an environment with more noise. ADC data including 20dB noise, shows up to 1.61x over effective number of bits (ENOB) increment improvement and a reduction in inference processing time of 5.82x when we applied proposed technique. © 2025 IEEE.

제목
Sliding-Window-based Fast and Lightweight ADC Pseudo-Randomness Compensation Technique for Low-Cost ADC
저자
Kwon, Jisu; Park, Daejin
DOI
10.1109/VLSITSA64674.2025.11046543
발행일
2025
유형
Conference paper
저널명
2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers