LLVM-Based Efficient Hybrid Cache and TCM Memory Allocation for Low-Latency

초록

Cache memory has been introduced to accelerate embedded system performance and is automatically managed without programmer intervention through hardware-based cache controllers. However, since it operates based on typical variable access patterns, opportunities for complementary approaches remain. In contrast, Scratchpad Memory (SPM) or Tightly Coupled Memory (TCM), which is closely coupled with the processor core, require direct programmer control over data placement or compiler optimization support. Nevertheless, this control enables deterministic execution as intended by the programmer, allowing TCM to compensate for the shortcomings of cache memory. While various memory system optimization studies have been conducted, research that enhances applicability by utilizing LLVM passes for LLVM compiler optimization development or preserving existing build systems has been limited. This paper proposes a new method that extracts metadata via an LLVM pass seamlessly integrated with existing build systems and uses it to allocate data to DTCM RAM in a tiered manner. Experiments using CoreMark-Pro, MiBench, and STREAM benchmarks compared performance with access frequency-based dynamic programming allocation. Results showed the locality-based method achieved more stable performance and reduced execution cycles by 1.4% to 8%, demonstrating that locality-aware allocation is more effective than frequency-only approaches in cache-TCM hybrid environments. © 2009-2012 IEEE.

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