Charge Trap Flash-Gated Inverter-based In-Memory Analog-to-Digital Converter for Compute-in-Memory

초록

We propose a charge trap flash (CTF)-gated inverter-based in-memory analog-to-digital converter (ADC) that achieves highly compact and energy-efficient operation for compute-in-memory (CIM) systems. By exploiting programmable threshold voltages of CTF devices, the switching voltage of each inverter can be precisely controlled, enabling a quantization scheme with only two transistors per level. Through a fine-tuning process with soft-erase operations, the switching voltages of 13 inverters were evenly mapped with 0.1 V spacing. The fabricated ADC achieved the maximum DNL and INL of 0.11 LSB and 0.14 LSB, respectively. Benchmarking based on measured and simulated data suggests that the proposed design offers potentially superior area and energy efficiency. These results indicate the potential of CTF-gated inverter-based ADCs as promising candidates for CIM architectures. © 1980-2012 IEEE.

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