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Atomically Thin 0.65nm and 6nm Vertical Side-Wall MoS2 Channel Transistors
- Kim, Kihan;
- Jang, Byung Chul
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0초록
Si transistors will face scaling limits below 5 nm due to aggressive short channel effects (SCEs). Two-dimensional (2D) MoS2 semiconductor materials have become attractive for next-generation electronic devices. This study investigated the electrical characteristics of sidewall transistors with a MoS2 channel thickness of 0.65 nm and 6 nm, which is the optimal platform for evaluating SCEs. Furthermore, the conduction mechanism of MoS2 transistor is scrutinized by temperature dependent feature. These results will be a foundation stone for the development of ultra-scaled MoS2 transistor.
- 제목
- Atomically Thin 0.65nm and 6nm Vertical Side-Wall MoS2 Channel Transistors
- 저자
- Kim, Kihan; Jang, Byung Chul
- 발행일
- 2023
- 유형
- Proceedings Paper
- 저널명
- 2023 SILICON NANOELECTRONICS WORKSHOP, SNW
- 페이지
- 83 ~ 84
- 언어
- ENG
- 출판사
- IEEE
- 발행국가
- 미국
- 분량
- 2 페이지
- ISSN
- P 2161-4636