Atomically Thin 0.65nm and 6nm Vertical Side-Wall MoS2 Channel Transistors

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초록

Si transistors will face scaling limits below 5 nm due to aggressive short channel effects (SCEs). Two-dimensional (2D) MoS2 semiconductor materials have become attractive for next-generation electronic devices. This study investigated the electrical characteristics of sidewall transistors with a MoS2 channel thickness of 0.65 nm and 6 nm, which is the optimal platform for evaluating SCEs. Furthermore, the conduction mechanism of MoS2 transistor is scrutinized by temperature dependent feature. These results will be a foundation stone for the development of ultra-scaled MoS2 transistor.

제목
Atomically Thin 0.65nm and 6nm Vertical Side-Wall MoS2 Channel Transistors
저자
Kim, Kihan; Jang, Byung Chul
DOI
10.23919/SNW57900.2023.10183961
발행일
2023
유형
Proceedings Paper
저널명
2023 SILICON NANOELECTRONICS WORKSHOP, SNW
페이지
83 ~ 84