Boost-SEPIC Interleaved PFC Converter

  • Tran, Thien Dung; 
  • Cha, Honnyong; 
  • Nguyen, Chan Viet; 
  • Van Dai, Bui Dai; 
  • Park, Juyeong
Citations

SCOPUS

2

초록

This paper proposes a new power factor correction (PFC) converter based on the boost-SEPIC interleaved (BSI) structure. The inductor current of conventional interleaved boost PFC (IB-PFC) can easily become unbalanced due to the tolerance of components. The proposed PFC converter allows operation with the automatic balancing of phase currents without the complex balancing methods. This is achieved by the interleaved structure that combines boost and SEPIC circuits. Only one current sensor is required to control the input current of the PFC, reducing the complexity of hardware and increasing the reliability of the circuit. Moreover, with high voltage gain and low voltage stress on semiconductor devices, the proposed PFC converter can achieve higher efficiency than conventional IB-PFC. The above advantages make the proposed structure an attractive solution with practical PFC applications. A 1.6 kW prototype was built to evaluate the performance of the proposed converter. © 2023 The Korean Institute of Power Electronics.

키워드

boost-SEPIC interleaved converter; current balancing; interleaved boost; power factor correction
제목
Boost-SEPIC Interleaved PFC Converter
저자
Tran, Thien Dung; Cha, Honnyong; Nguyen, Chan Viet; Van Dai, Bui Dai; Park, Juyeong
DOI
10.23919/ICPE2023-ECCEAsia54778.2023.10213797
발행일
2023
유형
Conference paper
페이지
2675 ~ 2680